SOPC technology based medical ventilator control system

Respiratory machine can substitute for the respiratory function or auxiliary persons of respiratory function. It applies to respiratory failure and even stop breathing patients do artificial respiration. It helps patients to correct hypoxia and discharge of CO2 is saved the life of patients with certain critically important tool. Existing respiratory machine products, the master system is mostly based on a single chip to achieve some of the functions of the product is necessary to use high-end microprocessor, this makes the system cost is relatively high, and the external interface modules are more complex. Use the SOPC (programmable system on chip) technology design master system to take full advantage of the powerful features of IP cores, the number at the same time streamlining the peripherals only takes up a very small portion of the resource, greatly improving the system of price and performance. This article uses the SOPC design of continuous positive airway pressure ventilator in the master system, using an Altera Nios II company soft core processor as well as some general IP core, the author based on Avalon bus specification of the custom components, control logic all within the integrated single-chip FPGA to. Medical ventilator positive pressure ventilator is used to increase airway pressure method, air into lungs pulmonary pressure make lung cavity expansion. When the pressure loss, due to pulmonary cavity tissue elasticity, the lung to revert to the original shape, so after exchanging some air exhaled in vitro. At present, most of the ventilator is used to increase airway pressure method to give the patient aspirated. Ventilator air pressure required to deliver a DC motor, DC motor control signals for PWM signal, the signal under PWM duty cycle and cycle control of motor speed. External interface provides the key to accept the order, set the various parameters. Prompt information, status information, parameter information through the LCD display. In order to facilitate the testing of the system, use the UART to command and control interface, for direct control of the system, the interface after the finished product is fading.

System structure to SOPC technology as the core of respiratory machine master system block diagram shown in Figure 1.

Figure 1 ventilator system hardware structure diagram

Master system core FPGA with Altera Cyclone series EP1C6T144C8 company.

The Nios II CPU soft core processor, on the whole system for unified management. Polyline box as the main dashboard, download, debug using a PC, on the DC motor and master plate single power supply. DC motor work will flow to the mask, the motor according to the end of the signal to adjust the size of the air flow. The mask contains pressure detection module, through A/D conversion back to the main Control Board to conduct feedback regulation of airflow. Use veil for patients. DC motor control system using the PWM signal to DC motor control. SOPC Builder provided in standard IP core is not in the PWM component, you need to customize, PWM component output signal is a square wave, square wave cycles and duty adjustable. PWM task logic structure shown in Figure 2.

Figure 2 PWM task logic structure

Task logic PWM component are: • the PWM input task logic consists of a clock, an output signal, a permit, a 32-bit counters, and a 32-bit comparators; ● clock driver 32-bit counters, establish output signal cycle; • the comparator used on 32-bit comparator's current value and duty ratio to determine the output signal; if the current value is less than or equal to the duty ratio, the output logic signal is 0, otherwise 1.

PWM component registers file: ● clock_divde in one cycle PWM clock ticks; ● duty_cyclePWM output for the low level of clock cycles; ● enablePWM output allowed/prohibited. 0 to 1 on the rise of the PWM component. The PWM header file defines the registers and driver package: altera_avalon_pwm_init ();//PWM module initialization, including cycle setting altera_avalon_pwm_enable ();//PWM module enabling altera_avalon_p wm_disable ();//PWM module prohibit altera_avalon_ pwm_change_duty _cycle ();//PWM module dutyfactor adjusts for DC motors, PWM duty cycle needs to reach a certain amount before the motor work below the threshold (PWM_DUTY_THRESHOLD) PWM signal cannot drive motor, this part of the energy is converted into heat damage to the motor, so that when the PWM values set need to be aware of the value is set in the thresholds above, altera_avalon_pwm_change_duty_cycle () on the values set by the judge, if the value is less than the adjusted to PWM_DUTY_THRESHOLD PWM_DUTY_THRESHOLD + 1. Above the completion of the design, within the SOPC Builder on its packaging become SOPC components. Output and indicates the module system will need to enter the setting, control and display tips, this section features including touchtone, LED light output, buzzer output, LCD output, etc. Press to enter a user interacts with the system of important interfaces for keyboard Panel has four buttons, one for the "On/Off" key, a "Set" key, a key for the "Up", a "Down" keys. The "On/Off" function key for system start-up, shutdown; "Set" function key is used to set the parameter in the LCD is OK; the "Up" and "Down" function key is used to change the contents of the current option. The key output module in the Nios II SOPC Builder in the use of PIO module onConstruction, due to the real-time response key content, you need to open the interrupt, press the capture of the rising edge, when there are interruptions, enter interrupt register judgment interrupt sources and types, according to the existing schema information decision system action. LED display and buzzer output also uses PIO module structures, to make the current ample use of common anode polarity. LCD display using a universal LCD module 1602, SOPC Builder provided with the appropriate IP core. LCD 16 x 2, shows letters and numbers, the character set in the LCD module internal contains.

And PC communication interface system and PC communication has two interfaces, JTAG interface and UART interface.

JTAG interface used to configure the FPGA and programs for download; UART interface is used as command and control interface, to complete procedures for system debugging. These two components in the SOPC Builder is provided within, can be used directly. JTAG interface without too much configuration, external hardware connection is completed, you can add components internally, the JTAG port used by the operations completed by Quartus software in-house. UART interface with PC through RS-232 Protocol for communication, you can change the baud rate, parity, stop bits, bits of data transferred, as well as other optional RTS-CTS flow control signals, etc. The baud rate to use in practical application of 115200, 8 data bits, 1 stop bit, parity, flow control is set to none. External hardware connections use MAX3232 as level translation chip. Storage and hive FPGA use AS configuration mode to configure the chip to EPCS4. EPCS4 chip storage area can be divided into two areas: FPGA configuration store to save the FPGA configuration data, general store used to hold the system startup code and program data. In addition to the SOPC Builder offers EPCS components, Nios II IDE Flash Programmer utility can put data intrinsic to EPCS chip. FPGA internal left a 4K size of RAM, as the program run-time cache. SOPC Builder provides timer timer is a 32-bit interval timer, and we see a lot of SCM internal timer module similar, increment the count mode and decrement the count pattern, at the counter to 0 can generate interrupts, or you can order cycle pulse generator output a pulse. Register for periodl and periodh for writing can set timer cycle. System timer module, used to determine the length of the command execution time, press the key length, open after interruption can achieve long press to switch on the machine or the SHIFT key. A/D sampling A/D sampling is primarily intended to detect pressure and feedback, mask according to the feedback values and then adjust the pressure. Pressure detection after pressure signal by Maxim company A/D sampling MAX197 chip. And PWM component similar to SOPC Builder also failed to provide the appropriate A/D component IP core, customize, custom process and PWM component does.

System software design system workflow shown in Figure 3.

Figure 3 respiratory machine workflow

Work status set status: only in the system power off after it is electrified.

In addition, under no circumstances will not be able to enter the Setup State. And from the set state can only return to the shutdown. "Up" and "Down" keys to change the option "Set" key to enter setup or confirm settings, "On/Off" unset or exit the current settings for this layer interface, when you have returned to the original settings interface, and then press the "On/Off" to shutdown; shutdown state: liquid crystal display "Off", and the only response boot keys and commands; standby: LCD display for pressure delay; treatment status: responding to the "On/Off" key, "Up" and "Down" keys. Of these, the "On/Off" key is used to "start/stop"; "Up" and "Down" is used to 0.5 cm water column pressure for adjusting the current working pressure. On this four-State toggle are based on different times of the different key combinations, the design takes into account the treatment operation simplicity, most operations are carried out within the set state, treatment only need minor adjustments on the basis of the actual situation. Pressure feedback for respiratory machine this directly in the face of the patient's medical devices, security is very important, in addition, the pressure on the accuracy requirements are also quite high, even 5% of the pressure change for a patient's respiratory system is no small pressure. In the motor are output fluctuations, combined with the level of feedback to the pressure to compensate the output, you can prevent sudden malfunction of, as well as supply voltage fluctuation of pressure precision offset. Will A/D sampling results and pre-set values, if lower than the set value, the output value to the appropriate escalation; if higher than the set value, the reduction in output value. Regulation of the pressure output should gradually, according to the results set step PWM_T_STEP, each time changes only neutral PWM_T_STEP value so does not allow airflow and large swells and small, for patients with respiratory discomfort. Press the key and display system on the key requirements, in addition to the normal single press, long press to switch on the machine, Access sets the status of key combinations, etc. These special function keys is also based on single-key basis. Long press the key you need to press the trigger rising and falling edge is for judgement, single press of the falling edge interrupt to start counting the counter, to rise up along the interrupt comes, if count is greater than a certain threshold is considered the key for the key. Thresholds determine according to the system clock frequency and length of the delay. System displays mainly rely on LCD, 16 x 2 LCD onYou can only display two lines of menus, menu of the total number of much larger than the two, to that end, the menu display of the array and the implementation will need two pointers, display one-line scroll for observation.

Conclusion that this master control system of medical ventilator, prototype has been made out, is carrying out performance tests, currently running normally.

The entire system is designed to focus on custom embedded technology based on SOPC Nios II soft core processor design and motor-driven implementation, unlike traditional programmes based on microcontroller, Nios II FPGA chip only takes up a small portion of the resource, but completed including microcontroller and a considerable number of the feature, so that peripheral is both simplifies circuit board design, reduce peripheral device configuration, and effective control of the system hardware and software complexity, lowers costs, shorten the development cycle and makes it easier for the upgrading of future products.

References: 1. Li LAN ying, Nios II embedded soft core — SOPC design theory and application, Astronautics, 2006.11 2.

Altera. NiosII Processor Reference Handbook [EB/OL]. (2006-05).http://www.altera.com　　3. Altera. Altera Embedded Peripherals Handbook [EB/OL]. (2006-05). http://www.altera.com　　4. Peng Cheng Lim, challenge the SOC — based on the Nios SOPC design and practice, Tsinghua University Press, 2004