Thursday, December 23, 2010

DSP-based design of ECG monitoring module (1)

Cardiac contraction in the machinery, electrical cardiac agitation in advance, and to all body parts of diffusion, resulting in different parts of the body's generated potential difference. Through the surface of this change in the chronological order of difference credited by continuous stroke curve is the ECG electrocardiogram.

The diagnosis of cardiac arrhythmia ECG is the surest way to other clinical check while also can diagnose some arrhythmias, but accuracy is not high.

Through observation of the patient's ECG, the diagnostic accuracy of almost 100 per cent can be achieved. ECG monitoring modules feature is real-time recording of the patient's ECG waveform, and for automatic analysis and processing while giving the appropriate conclusions.

As digital signal processing technology and the development of large-scale integrated circuit technology, single-chip digital signal processor features and more powerful, more and more low prices, are increasingly being applied to people in all areas of production and life.

This article describes a DSP chip based ECG monitoring module solutions, discusses its hardware and software components.

The ECG monitoring module is a United States Texas Instruments company (TI) TMS320F206 as the core DSP data acquisition and processing module.

The entire system is installed on a 4-layer PCB Board, through the 9-pin RS-232 cable and PC communication, its principle diagram shown in Figure 1. All input signals including ECG1, ECG2 (two-channel ECG), TEMPI (temperature signal), RESP (respiratory signal), LEADOFF (lead off detection), PACE (pacemaker detection), and so on are premenstrual from ECG simulation processing module.

1 TMS320F206 introduction

TMS320F206 (hereinafter F206) is a TI company in 1996 introduced a performance-price ratio is very high in 16-bit fixed-point DSP chips, operation speed to 40MIPS.

F206 system with improved Harvard architecture, program memory and data memory bus, in order to maximize processing power. Its addressable space characters for 224K (64K Word program space, 64K Word data space, 64K word i/o space, 32K Word global space), word-space 64K first 32K characters can be mapped to F206 chip integrated flash memory (FLASH MEMORY), so you can make online emulator on F206 programming and erased. F206 chip with 4-stage pipeline structure, its instruction set specifically on signal processing in common travel-plus operations for optimized support for single-cycle of a multiplications/additive directive; support for memory block removal instructions, to better manage the program and data; support base 2 of FFT-reverse order retrieve addressing.

In addition to supporting high-speed operations, F206 also has a large number of on-chip peripherals include: ① ② software programmable timer; for program, data, I/O storage software programmable standby generator for easy and low-speed device interface; ③ on-chip oscillators and phase locked loop (PLL) for clock select × 1, × 2, × 4 ÷ 2; ④ synchronous serial port for easy and serial CODEC interface; ⑤ full duplex asynchronous serial ports for easy and PC communication.

2 hardware

The ECG monitoring module has a total of 4-way input: two-channel ECG ECG1 and temperature signals the way ECG2, TEMPI, all respiratory signal RESP, the use of time-of-sample works.

As a result of respiratory signal and temperature signal frequency far less than the frequency of the ECGRate, in the determination of the sampling rate is the ECG. Experience has shown that doing regular ECG, the requesting system bandwidth is about, according to 100Hz Nyquist sampling theorem, the sampling frequency must be not less than 200Hz. Considering that certain work margin, each channel sample rate from 250Hz, four channel, always be 1 kHz operating frequency. Channel switching works by a bidirectional analog switch CD4051, c, B, A control terminal connected to the three root TMS320F206 address line, through the i/o instructions to open the corresponding analog channels, the signal is sampled.

Signal sampling and quantify the work done by a ADS774.

ADS774 is United States Burr-Brown company produces 12-bit successive approximation type parallel A/converter D, typical conversion time for 8.5 μ s, and a variety of working methods for users to choose. In the ECG module we use pass-through throughout mode, only two root control line R/C and STATUS and TSM320F206 interface, it works and timing as shown in Figure 2.

TMS320F206 through instruction in XF pin on a width greater than 25ns low level pulse, launch once converted ADS774.

After starting the STATUS pin becomes ADS774 high, the conversion is finished ADS774 data line of data is valid, then its STATUS pin jumps back to low level, the level of the hopping trigger TMS320F206 INT1 external interrupt, 12-bit conversion data into the data storage.

Due to the on-chip data TMS320F206 storage space is limited, to save a lot of sampling data and operations of intermediate results require additional external data memory at the same time in order to debug a program able to set breakpoints and single-step operation, but also the need for additional external program memory.

We have 4 tablets Hitachi 8-bit SRAM HM62256-10, composed of two two 16-bit program memory and data memory, respectively with F206 PS and DS signal tablets. HM62256-10 typical of 100ns, access time and instruction cycle for TMS320F206 50ns. To save hardware costs of waiting for circuit, leveraging TMS320F206 chip programmable software waits for the status of the generators produce two wait States to meet the memory requirements of operating time. On-chip using TMS320F206 integrated full duplex asynchronous serial port, you can implement ECG module and PC communication. But RS232 level and is not compatible with TTL-level, we use a level translation chip MAX202, + 5V single supply, just add a few capacitors, will be able to complete the conversion of two-level. To prevent data during the transfer process disruption in the input output are coupled with optocoupler.

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